seL4

Performance

This page displays the latest benchmark numbers for seL4 from the publicly available sel4bench repository. The following times are reported as mean and standard deviation in the format mean (std dev), both rounded to the nearest integer.

  • IRQ invoke: Time in cycles to invoke a user-level interrupt handler running in the same address space as the interrupted thread.
  • IPC call: Time in cycles for invoking a server in a different address space on the same core.
  • IPC reply: Time in cycles for a server replying to a client in a different address space on the same core.
  • Notify: Time in cycles to send a signal from a process with priority 1 to a higher priority (255) process in a different address space

Default

ISA Mode Core/SoC/Board Clock IRQ Invoke IPC call IPC reply Notify
Armv7a 32 A9/i.MX6/Sabre 1.0 GHz 583 (13) 316 (3) 340 (8) 825 (11)
x86_64 64 i7-4770/Haswell 3.4 GHz 1553 (267) 580 (15) 596 (15) 1338 (70)
x86_64 64 i7-6700/Skylake (without meltdown mitigation) 3.4 GHz 1250 (201) 380 (3) 386 (3) 750 (83)
Armv8a 64 A57/Tx1/Jetson 1.9 GHz 664 (28) 403 (5) 416 (5) 920 (7)
RV64IMAC 64 U54-MC/SiFive Freedom U540/Hifive 1.5 GHz 983 (81) 469 (9) 650 (85) 1342 (44)

MCS

ISA Mode Core/SoC/Board Clock IRQ Invoke IPC call IPC reply Notify
Armv7a 32 A9/i.MX6/Sabre 1.0 GHz 801 (18) 323 (3) 363 (2) 1180 (13)
x86_64 64 i7-4770/Haswell 3.4 GHz 1931 (430) 592 (11) 601 (12) 1588 (12)
x86_64 64 i7-6700/Skylake (without meltdown mitigation) 3.4 GHz 1657 (340) 381 (2) 410 (6) 1056 (11)
Armv8a 64 A57/Tx1/Jetson 1.9 GHz 756 (21) 414 (6) 445 (3) 1038 (6)
RV64IMAC 64 U54-MC/SiFive Freedom U540/Hifive 1.5 GHz 2932 (143) 715 (82) 903 (101) 3808 (134)

Compilation Details

All benchmarks were built using the trustworthy-systems/sel4 docker image from the seL4 docker file repository

Default

ISA Mode Core/SoC/Board Clock Compiler Build command
Armv7a 32 A9/i.MX6/Sabre 1.0 GHz arm-linux-gnueabi-gcc GNU 10.2.1 init-build.sh -DFASTPATH=TRUE -DHARDWARE=TRUE -DFAULT=TRUE -DAARCH32=TRUE -DPLATFORM=sabre
x86_64 64 i7-4770/Haswell 3.4 GHz gcc GNU 10.2.1 init-build.sh -DFASTPATH=TRUE -DHARDWARE=TRUE -DFAULT=TRUE -DPLATFORM=x86_64
x86_64 64 i7-6700/Skylake 3.4 GHz gcc GNU 10.2.1 init-build.sh -DKernelSkimWindow=FALSE -DFASTPATH=TRUE -DHARDWARE=TRUE -DFAULT=TRUE -DPLATFORM=x86_64
Armv8a 64 A57/Tx1/Jetson 1.9 GHz aarch64-linux-gnu-gcc GNU 10.2.1 init-build.sh -DFASTPATH=TRUE -DHARDWARE=TRUE -DFAULT=TRUE -DAARCH64=TRUE -DPLATFORM=tx1
RV64IMAC 64 U54-MC/SiFive Freedom U540/Hifive 1.5 GHz riscv64-unknown-elf-gcc GNU 8.3.0 init-build.sh -DFASTPATH=TRUE -DHARDWARE=FALSE -DFAULT=FALSE -DRISCV64=TRUE -DPLATFORM=hifive

MCS

ISA Mode Core/SoC/Board Clock Compiler Build command
Armv7a 32 A9/i.MX6/Sabre 1.0 GHz arm-linux-gnueabi-gcc GNU 10.2.1 init-build.sh -DFASTPATH=TRUE -DHARDWARE=TRUE -DFAULT=TRUE -DAARCH32=TRUE -DPLATFORM=sabre -DMCS=TRUE
x86_64 64 i7-4770/Haswell 3.4 GHz gcc GNU 10.2.1 init-build.sh -DFASTPATH=TRUE -DHARDWARE=TRUE -DFAULT=TRUE -DPLATFORM=x86_64 -DMCS=TRUE
x86_64 64 i7-6700/Skylake 3.4 GHz gcc GNU 10.2.1 init-build.sh -DKernelSkimWindow=FALSE -DMCS=TRUE -DFASTPATH=TRUE -DHARDWARE=TRUE -DFAULT=TRUE -DPLATFORM=x86_64
Armv8a 64 A57/Tx1/Jetson 1.9 GHz aarch64-linux-gnu-gcc GNU 10.2.1 init-build.sh -DFASTPATH=TRUE -DHARDWARE=TRUE -DFAULT=TRUE -DAARCH64=TRUE -DPLATFORM=tx1 -DMCS=TRUE
RV64IMAC 64 U54-MC/SiFive Freedom U540/Hifive 1.5 GHz riscv64-unknown-elf-gcc GNU 8.3.0 init-build.sh -DFASTPATH=TRUE -DHARDWARE=FALSE -DFAULT=FALSE -DRISCV64=TRUE -DPLATFORM=hifive -DMCS=TRUE

Source Code

This page was generated on 2024-12-04 for sel4bench-manifest a47f8b85.